Clock and data recovery locking technique for large frequency offsets
US8139702B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 14, 2010 |
| Grant date | Mar 20, 2012 |
| Priority date | — |
| Expiry date | Jun 14, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L7/0004
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Techniques and apparatus for a clock and data recovery circuit to lock to data having frequency offsets relative to a local clock reference are disclosed. One embodiment includes a multi-step frequency tracking system in which each step is used to track a sub-range of frequency deviation from local clock reference. The frequency tracking sub-range of each step is selected so that the clock and data recovery system is relatively assured of achieving lock when the frequency of the incoming data lies within or is relatively near the frequency tracking sub-range of the selected step. Embodiments may use control signals to select the sub-ranges, and hence guide the frequency tracking portion of the clock and data recovery circuit to operate in a frequency tracking range that is optimized for achieving and maintaining lock.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.