Method and apparatus for a temperature compensated phase locked loop supporting a continuous stream receiver in an integrated circuit
US8140040B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Sep 11, 2009 |
| Grant date | Mar 20, 2012 |
| Priority date | — |
| Expiry date | Sep 9, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L1/022
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An integrated circuit including a Phase Locked Loop (PLL) configured for use with a continuous stream receiver is disclosed. A control voltage line is configured to deliver a control voltage with a capacitive load delivered by a capacitor array to the control voltage based upon an add signal and a subtract signal. A threshold generator generates a high threshold voltage and a low threshold voltage using and including at least one process dependent resistor and at least two temperature and process dependent current sources. The PLL responds during calibration to the control voltage being above the high threshold voltage by asserting the add signal directing the capacitor array to increase the capacitive load on the control voltage line, and to the control voltage being below the low threshold voltage by asserting the subtract signal to decrease the capacitive load.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.