Serial bus clock frequency calibration system and method thereof
US8140882B2 · kind B2 · utility
7Cited by
6References
24Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 18, 2009 |
| Grant date | Mar 20, 2012 |
| Priority date | — |
| Expiry date | Jul 6, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L7/10
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A serial bus clock frequency calibration system and a method thereof are disclosed herein. The system utilizes a first frequency calibration device and a second frequency calibration device both to share an oscillator as so to perform two-stage clock frequency resolution calibrations for generating different frequency-tuning ranges. This can bring an optimal frequency resolution and greatly reduce system complexity and save element cost.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.