Patent · US Active

Scheduling of pipelined loop operations

US8140883B1 · kind B1 · utility

1Cited by
6References
22Claims
0Family size

Assignee

Inventor

Key dates

Filing dateMay 1, 2008
Grant dateMar 20, 2012
Priority date
Expiry dateOct 9, 2030

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F2119/12
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Pipelined loop operations are efficiently scheduled. A preliminary as soon as possible (ASAP) schedule for a data operation in a pipelined loop is determined. A producer operation clock cycle associated with a producer operation in the pipelined loop is determined. The producer operation provides a data value for use by the data operation in a subsequent loop. A consumer operation clock cycle associated with a consumer operation in the pipelined loop is determined. The consumer operation obtains the data value from the data operation in a previous loop. The data operation is scheduled at the half-way point between the producer operation clock cycle and the consumer operation clock cycle.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.