ACS unit of a Viterbi decoder and method for calculating a bit error rate before a Viterbi decoder
US8140949B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 13, 2007 |
| Grant date | Mar 20, 2012 |
| Priority date | — |
| Expiry date | Jan 18, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/6337
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An ACS unit of a Viterbi decoder and a method for calculating the bit error rate (BER) before Viterbi decoder are provided. The ACS unit includes a state calculator and a BER calculator. The state calculator calculates the state metric of a corresponding target state in the trellis diagram and selects one of two candidate source states as the selected source state of the target state. The state calculator also provides a selection signal indicating the selected source state. The BER calculator is coupled to the state calculator for providing the sum of the BER of the selected source state and the bit error count (BEC) of the transition from the selected source state to the target state as the BER of the target state.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.