Data processing in a hybrid computing environment
US8141102B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 4, 2008 |
| Grant date | Mar 20, 2012 |
| Priority date | — |
| Expiry date | Jan 1, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/455
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Data processing in a hybrid computing environment that includes a host computer having a host computer architecture; an accelerator having an accelerator architecture, the accelerator architecture optimized, with respect to the host computer architecture, for speed of execution of a particular class of computing functions; the host computer and the accelerator adapted to one another for data communications by a system level message passing module; and a host application process executing on the host computer. Data processing such a hybrid computing environment includes starting, at the behest of the host application process, a thread of execution on the accelerator; returning, by the system level message passing module to the host application process, a process identifier (‘PID’) for the thread of execution; and managing, by the host application process, the thread of execution on the accelerator as though the thread of execution were a thread of execution on the host computer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.