Manufacturing method of semiconductor device having self-aligned contact connected to silicide layer on substrate surface
US8143152B2 · kind B2 · utility
0Cited by
5References
7Claims
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Key dates
| Filing date | Jul 15, 2009 |
| Grant date | Mar 27, 2012 |
| Priority date | — |
| Expiry date | Jul 15, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/017
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device 100 includes: a silicon substrate 102; a first gate 114a including a gate electrode 108 formed on the silicon substrate 102 and sidewalls 112 formed on the sidewalls of the gate electrode 108; a silicide layer 132 formed lateral to the sidewalls 112 of the first gate 114a on a surface of the silicon substrate 102; and a contact 164 which overlaps at least partially in plan view with the first gate 114a and reaches to the silicide layer 132 of the surface of the silicon substrate 102; wherein an insulator film is located between the contact 164 and the gate electrode 108 of the first gate 114a.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.