Self-trim and self-test of on-chip values

US8143953B2 · kind B2 · utility

Assignee

• DIALOG SEMICONDUCTOR INC. · DE

Inventors

• Hans Martin von Staudt · Bad Boll, DE
• Rolf Hülβ · Hockenheim, DE
• Michael Keller · Overland Park, US
• Helmut Burkhardt · Heidelberg, DE

Key dates

• Filing date: Jun 3, 2009
• Grant date: Mar 27, 2012
• Expiry date: Oct 16, 2030

Classification

• Technology area (CPC G): Physics
• CPC primary: G01R31/31932
• WIPO field: Measurement
• WIPO sector: Instruments

Abstract

A self-trim circuit provides a technique to trim a CUT (circuit under trim) using a LSB offset to determine the best digital value to trim the CUT. The self-trim circuit is also used to self-test the digital and analog portions of the self-trim circuitry, whereby the existence of a digital stuck at fault condition is detected. A state machine controls a digital stack to couple digital trim data to the CUT and read the output of a comparator circuit that signifies when a proper digital trim value has been used. Thereafter the proper digital trim value is stored into a nonvolatile memory.