Shaping inter-symbol-interference in sigma delta converter
US8144043B2 · kind B2 · utility
12Cited by
2References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 28, 2010 |
| Grant date | Mar 27, 2012 |
| Priority date | — |
| Expiry date | Aug 2, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M3/502
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A signal converting system is described that has a multi-segment digital to analog converter coupled to one or more error shaping loops. Each error shaping loop includes a quantizer with a feedback loop configured to generate a control signal responsive to a stream of symbols and to an error signal. Each error shaping loop also includes an inter-symbol-interference (ISI) shaping loop coupled to receive the control signal and to produce an ISI portion of the error signal that is responsive to inter-symbol transition rate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.