Hierarchical bounding of displaced parametric surfaces
US8144147B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 7, 2010 |
| Grant date | Mar 27, 2012 |
| Priority date | — |
| Expiry date | Apr 29, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T17/20
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Hierarchical bounding of displaced parametric surfaces may be a very common use case for tessellation in interactive and real-time rendering. An efficient normal bounding technique may be used, together with min-max mipmap hierarchies and oriented bounding boxes. This provides substantially faster convergence for the bounding volumes of the displaced surface, without tessellating and displacing the surface in some embodiments. This bounding technique can be used for different types of culling, ray tracing, and to sort higher order primitives in tiling architectures.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.