Patent · US Active

Display system having floating point rasterization and floating point framebuffering

US8144158B2 · kind B2 · utility

1Cited by
4References
10Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJan 11, 2011
Grant dateMar 27, 2012
Priority date
Expiry dateJan 11, 2031

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG09G5/393
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A floating point rasterization and frame buffer in a computer system graphics program. The rasterization, fog, lighting, texturing, blending, and antialiasing processes operate on floating point values. In one embodiment, a 16-bit floating point format consisting of one sign bit, ten mantissa bits, and five exponent bits (s10e5), is used to optimize the range and precision afforded by the 16 available bits of information. In other embodiments, the floating point format can be defined in the manner preferred in order to achieve a desired range and precision of the data stored in the frame buffer. The final floating point values corresponding to pixel attributes are stored in a frame buffer and eventually read and drawn for display. The graphics program can operate directly on the data in the frame buffer without losing any of the desired range and precision of the data.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.