Memory board structure having stub resistor on main board
US8144481B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 8, 2009 |
| Grant date | Mar 27, 2012 |
| Priority date | — |
| Expiry date | Feb 28, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2201/10159
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A memory system includes; a main board having memory bus with a wiring line communicating a signal from a memory controller mounted on the main board, first and second module sockets mounted on the main board and connecting the wiring line to first and second memory modules respectively inserted into the first and second module sockets, where the first memory module includes a first electrode connected to the wiring line and the second memory module includes a second electrode connected to the wiring line, and first and second stub resistors disposed on the main board and arranged as primary dual-branching stub resistors forming a T-branch connection structure between the first and second electrodes and a branching node connected to the wiring line.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.