Method for fabricating active device array substrate
US8148185B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 15, 2009 |
| Grant date | Apr 3, 2012 |
| Priority date | — |
| Expiry date | Mar 31, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/60
Abstract
A method for fabricating an active device array substrate is provided. First, a substrate having a display area and a sensing area is provided. Then, a first patterned conductor layer is formed on the display area of the substrate. A gate insulator is formed on the substrate. A patterned semiconductor layer, a second patterned conductor layer and a patterned photosensitive dielectric layer are formed on the gate insulator, wherein the second patterned conductor layer includes a source electrode, a drain electrode and a lower electrode, the patterned photosensitive dielectric layer covering the second patterned conductor layer includes an interface protection layer disposed on the source electrode and the drain electrode and a photo-sensing layer disposed on the lower electrode. A passivation layer is then formed on the substrate. After that, a third patterned conductor layer including a pixel electrode and an upper electrode is formed on the passivation layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.