Capacitor based digital to analog converter layout design for high speed analog to digital converter
US8149152B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 23, 2010 |
| Grant date | Apr 3, 2012 |
| Priority date | — |
| Expiry date | Jun 19, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D89/10
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A method and system for capacitor based digital to analog converter design layout for high speed analog to digital converter are provided. The method includes arranging a plurality of metal plates to form the capacitor. Each of the plurality of metal plates includes a driven plate and a common plate. The method also includes generating a plurality of interconnects in the common plate and extending the driven plate over the plurality of interconnects. Further, the method includes shielding the common plate by the driven plate. The system includes an analog to digital converter. The analog to digital converter also includes capacitor based digital to analog converter and digital logic for controlling digital operations in the analog to digital converter. The capacitor based digital to analog converter includes a plurality of capacitors, and a comparator for comparing the analog output from the digital to analog converter with a ground potential.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.