Patent · US Active

Flat display and method for modulating a clock signal for driving the same

US8149202B2 · kind B2 · utility

0Cited by
2References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJan 4, 2008
Grant dateApr 3, 2012
Priority date
Expiry dateAug 24, 2030

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG09G2330/06
  • WIPO fieldAudio-visual technology
  • WIPO sectorElectrical engineering

Abstract

A flat display and a method for modulating a clock signal for driving a flat display are provided. The flat display includes a clock generator and a clock modulator. The clock generator provides a clock signal that includes at least a first cycle waveform and a second cycle waveform following said first cycle waveform. The first cycle waveform is modulated by the clock modulator as a first modulated cycle waveform divided by a first positive modulated cycle waveform and a first negative modulated cycle waveform, and the second cycle waveform is modulated as a second modulated cycle waveform divided by a second positive modulated cycle waveform and a second negative modulated cycle waveform. The first positive modulated cycle waveform and the first negative modulated cycle waveform have a first duration difference, and the second positive modulated cycle waveform and the second negative modulated cycle waveform have a second duration difference different from the first duration difference.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.