Non-volatile memory device and program method thereof
US8149635B2 · kind B2 · utility
29Cited by
6References
20Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jan 18, 2010 |
| Grant date | Apr 3, 2012 |
| Priority date | — |
| Expiry date | Sep 30, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/10
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A non-volatile memory device including a memory cell array; a read/write circuit configured to drive bit lines of the memory cell array with a negative bit line voltage according to data to be programmed; a bit line setup-time measuring circuit configured to measure the bit line setup-time, which may be a function of the amount of data to be programmed, at each ISPP program loop; and a control logic configured to control the program voltage and/or the applied time of a program voltage applied to the selected wordline of the memory cell array based on the measured bit line setup-times measured at each ISPP program loop.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.