Detection of a disturbance in a calculation performed by an integrated circuit
US8150029B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 28, 2006 |
| Grant date | Apr 3, 2012 |
| Priority date | — |
| Expiry date | Oct 28, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2207/7271
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for detecting a disturbance of a calculation, by an electronic circuit, of a result of an integral number of applications of an internal composition law on elements of an abelian group, by successive iterations of different steps according to the even or odd character of a current coefficient of a polynomial representation of said integral number, the degree of which determines the number of iterations, each iteration including: in case of an odd current coefficient, updating at least one first variable intended to contain the result at the end of the calculation; and in case of an even current coefficient, of updating a second variable and a comparison of this second variable with an expected value.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.