System management mode inter-processor interrupt redirection
US8151027B2 · kind B2 · utility
21Cited by
8References
12Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 8, 2009 |
| Grant date | Apr 3, 2012 |
| Priority date | — |
| Expiry date | Apr 8, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/4812
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method, processor, and system are disclosed. In one embodiment method includes a first processor core among several processor cores entering into a system management mode. At least one of the other additional processor cores apart from the first processor core remain operational and do not enter the system management mode. Then, once in the system management mode, the first processor core responds to an inter-processor interrupt.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.