SSD with a channel multiplier
US8151038B2 · kind B2 · utility
1Cited by
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20Claims
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Key dates
| Filing date | May 19, 2009 |
| Grant date | Apr 3, 2012 |
| Priority date | — |
| Expiry date | Jun 5, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F3/0688
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An integrated circuit includes a first serial advanced technology attachment (SATA) channel, a plurality of second SATA channels, and a channel multiplier. The first SATA channel is configured to be coupled to a corresponding serial data bus of a host device. Each of the plurality of SATA channels is configured to be coupled to a respective separate memory device channel. The channel multiplier is configured to couple the first SATA channel to each of the plurality of second SATA channels.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.