Method and device for securing the memory of a computer against errors due to radiation
US8151169B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 24, 2007 |
| Grant date | Apr 3, 2012 |
| Priority date | — |
| Expiry date | Jul 23, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/19
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The method is for hardening a computer based on off-the-shelf components so that it resists bombardment by particles of cosmic origin encountered at high altitude and near the poles. It relates more particularly to a computer comprising a processor/bridge pair, the bridge ensuring auxiliary functions for controlling the data exchanges between the processor and a random-access memory incorporating a Hamming-type error corrector code into the information exchanged and consists in inserting between the processor/bridge pair and the random-access memory an interface device carrying out a two-way transcoding between the Hamming-type error correction code incorporated into the information exchanged by the auxiliary functions for controlling the data exchanges of the processor/bridge pair and a Reed-Solomon-type error correction code adapted to the architecture of the random-access memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.