Patent · US Active

Accessing copy information of MMIO register by guest OS in both active and inactive state of a designated logical processor corresponding to the guest OS

US8151275B2 · kind B2 · utility

9Cited by
7References
11Claims
0Family size

Assignee

Inventor

Key dates

Filing dateJun 12, 2006
Grant dateApr 3, 2012
Priority date
Expiry dateFeb 2, 2031

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F2009/45583
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A method and an apparatus for storing a copy of memory-mapped I/O (MMIO) register are provided for enhancing data processing efficiency. In a structure in which data processing is executed by associating a plurality of logical processors with a physical processor by timing sharing, a host OS stores copy information, namely, shadow, of the MMIO register corresponding to a logical processor in memory both in an active state where a physical processor is allocated to a logical processor corresponding to a guest OS and in an inactive state where no physical processor is allocated to a logical processor. This structure enables a guest OS to gain faster access to the MMIO register through the shadow by memory access, instead of a direct access to the MMIO register, so as to achieve efficient data processing.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.