Programmable metal elements and programmable via elements in an integrated circuit
US8154053B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 20, 2009 |
| Grant date | Apr 10, 2012 |
| Priority date | — |
| Expiry date | Jul 3, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/177
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An integrated circuit may include one or more cells, with each cell comprising a first and a second input terminal, a first and a second output terminal, and a number of connection stages configured to couple each input terminal to a corresponding respective output terminal. The stages may include one stage per metal layer of the integrated circuit and one stage per VIA layer of the integrated circuit. Each stage may be configured with a pair of input ports and a pair of output ports. Each output port of a stage may serially connect to a corresponding respective input port of a first adjacent stage, and each input port of the stage may also serially connect to a corresponding respective output port of a second adjacent stage. The pair of input ports may also be configured to programmably connect to the pair of output ports within the same stage, according to one of two different connection patterns, to establish a respective connection within the stage. A combination of the respective connections within the stages may determine which input terminal of the cell connects to which output terminal of the cell.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.