Laminated electronic component
US8154849B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 13, 2008 |
| Grant date | Apr 10, 2012 |
| Priority date | — |
| Expiry date | Jan 8, 2029 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49204
- WIPO fieldSurface technology, coating
- WIPO sectorChemistry
Abstract
A laminate is prepared in which adjacent internal electrodes are electrically insulated from each other at an end surface at which the internal electrodes are exposed, a space between the adjacent internal electrodes, which is measured in the thickness direction of insulating layers, is about 10 μm or less, and a withdrawn distance of the adjacent internal electrodes from the end surface is about 1 μm or less. In an electroplating step, electroplating deposits deposited on the ends of the adjacent internal electrodes are grown so as to be connected to each other.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.