Single pin port power control
US8156352B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 27, 2009 |
| Grant date | Apr 10, 2012 |
| Priority date | — |
| Expiry date | Jun 10, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F1/266
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A power controller for a peripheral bus interface. A peripheral bus power controller includes a first terminal, a second terminal coupled to receive an power enable input signal from a host controller, and a third terminal coupled to provide an over-current output signal indicative of an over-current condition to the host controller. The peripheral bus power controller further includes an enable circuit configured to assert a power enable output signal on the first terminal responsive to receiving the power enable input signal and a first buffer configured to provide the over-current output signal to the host controller responsive to the power controller detecting the over-current condition on the first terminal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.