Patent · US Active

Low density parity check codes decoder and method thereof

US8156399B2 · kind B2 · utility

1Cited by
12References
10Claims
0Family size

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Key dates

Filing dateMar 7, 2011
Grant dateApr 10, 2012
Priority date
Expiry dateMar 7, 2031

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03M13/6516
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

A low density parity check codes decoder decodes an LDPC code with an arbitrary coding rate by the same configuration. The low density parity check codes decoder enables decoding of an LDPC code constituted by a base matrix of Mbmax rows and Nbmax columns and a permutation matrix as an element of the base matrix. It stores therein Mbmax×Nbmax validity/invalidity flags, shift amounts of valid permutation matrices, a permutation matrix size in a processing target code, and the number of rows of a base matrix in the processing target code, determined depending on a check matrix for the processing target LDPC code, and generates column addresses and a row address to be given to column processing calculation sections and a row processing calculation section that perform calculation in accordance with a BP algorithm by utilizing the stored information, so that it can process an LDPC code for a smaller base matrix than the aforementioned base matrix as well.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.