Method of estimating a leakage current in a semiconductor device
US8156460B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 26, 2009 |
| Grant date | Apr 10, 2012 |
| Priority date | — |
| Expiry date | Jul 6, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/367
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In a method of estimating a leakage current in a semiconductor device, a chip including a plurality of cells is divided into segments by a grid model. Spatial correlation is determined as spatial correlation between process parameters concerned with the leakage currents in each of the cells. A virtual cell leakage characteristic function of a cell is generated by arithmetically operating actual leakage characteristic functions. A segment leakage characteristic function of a segment is generated by arithmetically operating the virtual cell leakage characteristic functions of all cells in the segment. Then, a full chip leakage characteristic function of the chip is generated by statistically operating the segment leakage characteristic functions of all segments in the chip. Accordingly, computational loads of Wilkinson's method for generating the full chip leakage characteristic function can remarkably be reduced.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.