Stacked semiconductor module
US8159061B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 22, 2010 |
| Grant date | Apr 17, 2012 |
| Priority date | — |
| Expiry date | Mar 1, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3511
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A stacked semiconductor module is made by stacking a second semiconductor device having a second semiconductor chip mounted to the top surface of a second semiconductor substrate above the top surface of a first semiconductor device having a first semiconductor chip mounted to a first semiconductor substrate. The top surface of the first semiconductor substrate is provided with a first connection terminal and the bottom surface of the first semiconductor substrate is provided with an external connection terminal. A region of the bottom surface of the second semiconductor substrate lying opposite to the second semiconductor chip is provided with a second connection terminal. A conductive connecting member connects the first connection terminal to the second connection terminal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.