Multilayer chip capacitor, motherboard apparatus having the same, and power distribution network
US8159813B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 13, 2008 |
| Grant date | Apr 17, 2012 |
| Priority date | — |
| Expiry date | Dec 8, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/19105
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
There is provided a multilayer chip capacitor including: a capacitor body including first and second capacitor units arranged in a laminated direction; and first to fourth outer electrodes formed on side surfaces of the capacitor body, respectively, wherein the first capacitor unit includes first and second inner electrodes of different polarities alternately arranged in the capacitor body to oppose each other while interposing a corresponding one of dielectric layers, the second capacitor unit includes third and fourth inner electrodes of different polarities alternately arranged in the capacitor body to oppose each other while interposing another corresponding one of the dielectric layers, the first and second capacitor units are electrically insulated from each other, and the first capacitor unit operates in a first frequency range and the second capacitor unit operates in a second frequency range lower than the first frequency range.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.