Nonvolatile semiconductor memory device and memory system
US8159882B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 2, 2008 |
| Grant date | Apr 17, 2012 |
| Priority date | — |
| Expiry date | Jun 12, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2211/5646
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor memory device executes a writing operation based on a first bit assignment pattern at the time of writing. The first bit assignment pattern is created such that pieces of x-bit data assigned to adjacent threshold distributions have only a one-bit difference therebetween and an alignment of data on the same digit of 2x pieces of x-bit data corresponding to an alignment of 2x pieces of threshold distributions contains at least two transition points of “0” and “1”. The semiconductor memory device operates at the time of reading such that a read voltage corresponding to the transition points of “0” and “1” is applied to the word line on a page basis to determine x-bit data stored in the memory cell one-bit by one-bit based on the first assignment pattern. The page contains a set of data on the same digit bit in pieces of x-bit data stored in the memory cells connected to the word line.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.