Systems and methods for low cost LDPC decoding
US8161348B2 · kind B2 · utility
3Cited by
44References
23Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Feb 5, 2008 |
| Grant date | Apr 17, 2012 |
| Priority date | — |
| Expiry date | Feb 17, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/6325
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Various embodiments of the present invention provide systems and circuits that provide for LDPC decoding and/or error correcting. For example, various embodiments of the present invention provide LDPC decoder circuits that include a soft-input memory, a memory unit, and an arithmetic unit. The arithmetic unit includes a hardware circuit that is selectably operable to perform a row update and a column update. In such cases, a substantial portion of the circuitry of the hardware circuit used to perform the row update is re-used to perform the column update.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.