Reconstruction of image in a Bayer pattern
US8165394B2 · kind B2 · utility
3Cited by
5References
18Claims
0Family size
Assignee
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Key dates
| Filing date | Sep 18, 2008 |
| Grant date | Apr 24, 2012 |
| Priority date | — |
| Expiry date | Feb 23, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N2209/046
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Architecture for decoding (demosaicing) a source image and performing reconstruction directly from the Bayer pattern to reduce memory size and improve communication bandwidth. The architecture can be easily implemented in hardware such as in field programmable gate arrays (FPGAs) and application-specific integrated circuits (ASICs).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.