Controller with indirect accessible memory
US8166213B2 · kind B2 · utility
2Cited by
6References
25Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 21, 2007 |
| Grant date | Apr 24, 2012 |
| Priority date | — |
| Expiry date | Jul 21, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/128
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A controller has an interface, a buffer memory, a first set of registers for accessing the buffer memory, a second set of registers independent from the first set of registers for accessing the buffer memory, and a control unit for decoding and executing buffer memory access commands received by the interface to access the buffer memory through either the first or second set of registers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.