Patent · US Active

Trusted boot

US8166289B2 · kind B2 · utility

30Cited by
3References
22Claims
0Family size

Assignee

Inventors

Key dates

Filing dateFeb 5, 2009
Grant dateApr 24, 2012
Priority date
Expiry dateOct 13, 2030

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F2221/2143
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

In one embodiment, a method for trusted booting of a cryptographic processor system is disclosed. Default image(s) is loaded into a field-programmable logic chip or circuit (FPLC). The default image(s) cannot perform cryptographic processing, but can perform a first algorithm that is unclassified. A processor, internal or external to the FPLC, can be used with the default image. A multi-layer or multi-part key has portions stored in two different places. A protected image is decrypted with the multi-layer key using the first algorithm and loaded into the FPLC. Cryptographic processing is performed using a second algorithm classified by the government.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.