Redriver with two reference clocks and method of operation thereof
US8166334B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 20, 2008 |
| Grant date | Apr 24, 2012 |
| Priority date | — |
| Expiry date | May 22, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F5/06
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A two reference clock architected redriver includes an inbound elastic buffer and an outbound elastic buffer. Data transmitted to and received from a North Bridge uses a common reference clock architecture. Data transmitted to and received from an external blade uses a separate reference clock architecture. The inbound elastic buffer includes an inbound elastic buffer recovered clock domain, an inbound elastic buffer common reference clock domain, and an inbound decoder/descrambler, an inbound scrambler/encoder, and inbound liner shift registers. The outbound elastic buffer includes an outbound elastic buffer common reference clock domain, an outbound elastic buffer low jitter clock domain, and an outbound decoder/descrambler, an outbound scrambler/encoder, and outbound liner shift register.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.