Patent · US Active

Clock gating using abstraction refinement

US8166444B2 · kind B2 · utility

2Cited by
4References
17Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJun 23, 2009
Grant dateApr 24, 2012
Priority date
Expiry dateJun 8, 2030

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F2119/06
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

An initial clock gating function is introduced to an original circuit design. Using abstraction-refinement, the initial clock gating function is modified such that the gated circuit design is equivalent to the original circuit design. A model checker, such as a SAT solver, may be utilized to determine equivalency of two circuit designs. A counter-example may be determined by the model checker to negate equivalency. The counter-example may be utilized to modify the initial clock gating function to determine a modified gated circuit design that is equivalent to the original circuit design.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.