Lateral transient voltage suppressor with ultra low capacitance
US8169000B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 15, 2010 |
| Grant date | May 1, 2012 |
| Priority date | — |
| Expiry date | Oct 21, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D89/611
Abstract
A lateral transient voltage suppressor with ultra low capacitance is disclosed. The suppressor comprises a first conductivity type substrate and at least one diode cascade structure arranged in the first conductivity type substrate. The cascade structure further comprises at least one second conductivity type lightly doped well and at least one first conductivity type lightly doped well, wherein there are two heavily doped areas arranged in the second conductivity type lightly doped well and the first conductivity type lightly doped well. The cascade structure neighbors a second conductivity type well, wherein there are three heavily doped areas arranged in the second conductivity type well. The suppressor further comprises a plurality of deep isolation trenches arranged in the first conductivity type substrate and having a depth greater than depths of the second conductivity type lightly doped well, the second conductivity type well and the first conductivity type lightly doped well. Each doped well is isolated by trenches.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.