Semiconductor devices including first and second silicon interconnection regions
US8169074B2 · kind B2 · utility
1Cited by
10References
20Claims
0Family size
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Key dates
| Filing date | Jun 30, 2010 |
| Grant date | May 1, 2012 |
| Priority date | — |
| Expiry date | Jul 3, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/0149
Abstract
Provided are a semiconductor device and a method of fabricating the same. The semiconductor device includes a first interconnection disposed on a substrate. The interconnection includes a first silicon interconnection region and a first metal interconnection region sequentially stacked on the substrate. A second interconnection includes a second silicon interconnection region and a second metal interconnection region that are stacked sequentially. The second silicon interconnection region has a lower resistivity than the first silicon interconnection region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.