Receiver to match delay for single ended and differential signals
US8169235B2 · kind B2 · utility
0Cited by
12References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 4, 2011 |
| Grant date | May 1, 2012 |
| Priority date | — |
| Expiry date | May 4, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/018514
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
In one embodiment, a receiver circuit is provide that may receive either a differential input or a single-ended input corresponding to an interface. The receiver circuit may include at least two current sources to control a gain of an amplification stage in the receiver. If the receiver circuit is receiving a differential input, one of the current sources may be used. If the receiver circuit is receiving a single-ended input, both of the current sources may be used. A larger gain may thus be provided for the single-ended input as compared to the differential input.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.