Array substrate and method of manufacturing the same
US8169559B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 3, 2009 |
| Grant date | May 1, 2012 |
| Priority date | — |
| Expiry date | Dec 30, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2300/0852
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
In an array substrate and a method of manufacturing the array substrate, an array substrate includes a first switching element, a second switching element, a third switching element and a fourth switching element. The first switching element is electrically connected to a first data line. The second switching element is electrically connected to a second data line adjacent to the first data line. The third switching element is electrically connected to a data power line interposed between the first and second data lines. The fourth switching element is electrically connected to a gate power line receiving a voltage having different polarity from a voltage applied to the data power line. Therefore, light transmittance, opening ratio and display quality are improved.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.