Driver amplifier having a programmable output impedance adjustment circuit
US8170505B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 30, 2008 |
| Grant date | May 1, 2012 |
| Priority date | — |
| Expiry date | Mar 1, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F1/56
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A driver amplifier in an integrated circuit is suitable for driving a signal onto an output node and through an output terminal, and through a matching network to a power amplifier. A novel Programmable Output Impedance Adjustment Circuit (POIAC) within the integrated circuit is coupled to the output node and affects an output impedance looking into the output terminal. When the output impedance would otherwise change (for example, due to a driver amplifier power gain change), the POIAC adjusts how it loads the output node such that the output impedance remains substantially constant. The POIAC uses a series-connected inductor and capacitor L-C-R circuit to load the output node, thereby reducing the amount of capacitance and die area required to perform multi-band impedance matching with a power amplifier. Multi-band operation is accomplished by changing an effective capacitance in the L-C-R circuit depending on communication band information received by the POIAC.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.