Direct current (DC) offset correction using analog-to-digital conversion
US8170506B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 29, 2008 |
| Grant date | May 1, 2012 |
| Priority date | — |
| Expiry date | Oct 4, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L27/364
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Techniques for reducing or eliminating DC (direct current) offset in transmitters are disclosed. An apparatus for DC offset reduction may include a converter, a digital engine, and a plurality of programmable current supplies. The converter is configured to provide digital representations of a plurality of DC currents associated, respectively, with a plurality of differential signal legs. The digital engine is configured to receive the digital representations and to produce instructions for generating compensating currents for the plurality of differential signal legs based on comparisons, respectively, between each of the digital representations and a calibration current. The programmable current supplies correspond, respectively, to the differential signal legs. The current supplies are configured to inject the compensating currents into the differential signal legs, respectively, to reduce DC offset between the differential signal legs, based upon the instructions. The instructions allow one-shot DC offset correction, instead of successive approximation for DC offset correction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.