Patent · US Active

Multiprocessor gateway

US8171199B2 · kind B2 · utility

2Cited by

3References

20Claims

0Family size

Assignee

Robert Bosch GmbH · DE

Inventors

Markus Ihle · Reutlingen, DE
Tobias Lorenz · Schwieberdingen, DE
Jan Taube · Reutlingen, DE
Stefan Bleeck · Hamburg, DE

Key dates

Filing date	Apr 17, 2007
Grant date	May 1, 2012
Priority date	—
Expiry date	Apr 17, 2027

Classification

Technology area (CPC H)Electricity
CPC primaryH04L2012/40241
WIPO fieldDigital communication
WIPO sectorElectrical engineering

Abstract

A multiprocessor gateway for multiple serial buses includes: multiple communication modules that are each provided for connection of one serial bus; multiple processors for processing data that are transferred in word-based fashion, via an internal system bus appurtenant to the respective processor, between the processor and the communication modules, the internal system buses of the multiprocessor gateway being connected to the communication modules, which have a respective appurtenant interface unit for each system bus, each processor exchanging data, via its appurtenant system bus and the interface unit, appurtenant to the system bus, of a communication module, with the serial bus connected to the communication module, independently of the other processors and without waiting time.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.