Accelerating traceback on a signal processor
US8171265B2 · kind B2 · utility
0Cited by
7References
40Claims
0Family size
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Key dates
| Filing date | Dec 8, 2008 |
| Grant date | May 1, 2012 |
| Priority date | — |
| Expiry date | Dec 8, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/355
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method executed by an instruction set on a processor is described. The method includes providing a tbbit instruction, inputting a first index for the tbbit instruction, loading a second value for the tbbit instruction, wherein the second value comprises at least 2b bits, using selected b bits of the first index to select at least one target bit in the loaded second value, shifting the target bit into the bottom of the first index, and computing a second index based on the shifting of the target bit into the bottom of the first index. Other methods and variations are also described.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.