Device interconnects
US8173908B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 30, 2009 |
| Grant date | May 8, 2012 |
| Priority date | — |
| Expiry date | May 31, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K3/303
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of fabricating a device structure, comprises: forming an insulating layer (3b) over a first set of devices disposed over a substrate (3); forming one or more vias in the insulating layer; disposing a second set of devices (6) over the insulating layer, wherein devices of the second set comprise respective electrical contacts (6a) and are disposed over the insulating layer (3b) such that a side on which a contact (6a) can be accessed faces the substrate (3); and forming one or more electrical contacts between the first set of devices and the second set of devices (6) through the via(s). The second set of devices and at least one via are positioned such that one or more of the vias lies at least partially within the footprint of two devices, each belonging to a different device layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.