Gate driver and display panel utilizing the same
US8174480B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 12, 2008 |
| Grant date | May 8, 2012 |
| Priority date | — |
| Expiry date | Jan 21, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2310/0286
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A gate driver including a shift register, a level shifter, an output buffer, and a processing unit. The shift register generates a shifted signal. The level shifter generates a level signal according to a first operation voltage, a second operation voltage and the shifted signal. The output buffer provides a scan signal according to the level signal. The processing unit controls the level signal to follow the second operation voltage when the first operation voltage equals to a first preset value and the second operation voltage is higher than a second preset value less than the first preset value.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.