Packaging digital front end
US8174720B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 6, 2008 |
| Grant date | May 8, 2012 |
| Priority date | — |
| Expiry date | Feb 4, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06K2215/0082
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A package assembly method and system may include a processor, a more printing device, an assembly device, a knowledge base containing a structural design ontology, and a memory structure. A memory structure may contain instructions that instruct the processor to query the knowledge base to obtain a two dimensional package model based on a known three dimensional package model and a set of intents, convert a three dimensional graphic representation to a two dimensional graphic representation using a semantic structure, access a packaging rule set to obtain rules for assembly of a three dimensional package from the model, instruct a printing device to apply the two dimensional graphic representation to the two dimensional package model, and instruct the assembly device to apply the rules for assembly to create the three dimensional package.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.