Patent · US Active

Systems and methods for implementing block cipher algorithms on attacker-controlled systems

US8175265B2 · kind B2 · utility

4Cited by
3References
47Claims
0Family size

Assignee

Inventors

Key dates

Filing dateSep 2, 2008
Grant dateMay 8, 2012
Priority date
Expiry dateFeb 27, 2031

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH04L2209/16
  • WIPO fieldDigital communication
  • WIPO sectorElectrical engineering

Abstract

Systems and methods for an implementation of block cipher algorithms (e.g., AES) use lookup tables to obscure key information, increasing difficulty for those with privileged access to a system performing the AES algorithm to obtain such key information. The implementation encodes round key information into a first plurality of tables (T1), which when used for lookup operations also complete SubBytes operations, and output state in an encoded format. A Shiftrows operation is performed arithmetically on the state output from the T1 table lookups. A second plurality of tables (T2) are used to perform a polynomial multiplication portion of MixColumns to state from Shiftrows, and an XOR portion of MixColumns is performed arithmetically on the columns outputted from using the T2 tables. Encoding from the T1 tables is made to match a decoding built into the T2 tables. Subsets of the T1 tables use the same T2 tables, reducing a memory footprint for the T2 tables. Multiple AES keys can be embedded in different sets of T1 tables that encode for the same set of T2 tables.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.