Generating stop indicators based on conditional data dependency in vector processors
US8176299B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 24, 2008 |
| Grant date | May 8, 2012 |
| Priority date | — |
| Expiry date | Dec 7, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3838
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Described is a method for performing parallel operations in a computer system when one or more conditional dependencies may be present, where a given conditional dependency includes a dependency associated with at least two data elements based on a pair of conditions. During operation, a processor receives instructions for generating one or more stop indicators based on actual dependencies, where a given stop indicator indicates the position of a given actual dependency that can lead to different results when the data elements are processed in parallel than when the data elements are processed sequentially, and where the given actual dependency occurs when the pair of conditions matches one or more criteria. Then, the processor executes the instructions for generating the one or more stop indicators.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.