Apparatus for detecting jitter of phase locked loop
US8179176B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 10, 2010 |
| Grant date | May 15, 2012 |
| Priority date | — |
| Expiry date | Dec 3, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/095
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for detecting jitter of a Phase Locked Loop (PLL), which is capable of detecting a jitter level of the PLL without using a separate jitter measurement device, is disclosed. The apparatus for detecting the jitter of the PLL includes the PLL configured to detect a phase difference signal between a reference clock and a feedback clock and to generate an oscillation signal having a predetermined frequency according to the phase difference signal, a variable phase delay unit configured to switch a plurality of capacitors according to an input delay control signal and to delay the phase difference signal from the PLL according to the delay control signal, a comparator configured to compare the phase difference signal from the PLL with the phase difference signal delayed by the variable phase delay unit and to detect a delay period of the phase difference signal, and a lock detection unit configured to detect whether the oscillation signal is within a lock range after the delay period detected by the comparator.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.