Flash management using logical page size
US8180954B2 · kind B2 · utility
75Cited by
6References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 15, 2009 |
| Grant date | May 15, 2012 |
| Priority date | — |
| Expiry date | Jun 19, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/0246
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Disclosed are techniques for flash memory management, including tracking payload data via one or more data structures configured to define the size of logical pages in a flash memory. In various embodiments, the logical page size may be larger than, equal to, or smaller than a physical page size of a flash memory chip.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.